Specifying Requirements
Buffer data flows in only one direction, from the producer to the consumer(s). With
synchronization objects, fences are generated at both endpoints and flow in both
directions. Setting up synchronization resources begins by determining the requirements
of each endpoint. The producer and consumers must query the NVIDIA drivers they will use
with the appropriate APIs to obtain separate NvSciSyncAttrList
handles.
The handles represent the requirements for signaling (writing to) and waiting for
(reading from) synchronization objects.
If an endpoint directly writes to or reads from the stream packets with the CPU instead
of using an NVIDIA API, it does not generate fences and does not need synchronization
signaling requirements. The endpoint must perform CPU waits for fences from the other
endpoint and must create a waiting requirement attribute list with the
NeedCpuAccess
flag set.
In some cases, an application endpoint may require that packets it receives are available immediately, without waiting for a fence. This does not require synchronization waiting requirement attributes. Instead, the other endpoint is notified of CPU wait before sending the packets.
Once an endpoint determines its signal and wait requirements for synchronization objects,
it stores the signal requirements locally and passes the wait requirements, one
NvSciSyncAttrList
per packet element, to the other endpoint through
the stream. It passes an NvSciSyncAttrList
with the wait requirement
attribute, if fences are supported, into the endpoint block by calling
NvSciStreamBlockElementWaiterAttrSet()
. If the waiter for the
element referenced by elemIndex
does not support fences, NULL pointer
is passed. The function call is the same for both producer and consumer endpoints.
Ownership of the sync attribute handle remains with the caller. The stream creates a
duplicate before the function returns.
NvSciStreamBlockSetupStatusSet()
function with a
value of NvSciStreamSetup_WaiterAttrExport
to inform
NvSciStream
that specifying waiter requirements is
complete.NvSciError
NvSciStreamBlockElementWaiterAttrSet(
NvSciStreamBlock const block,
Uint32_t const elemIndex,
NvSciSyncAttrList const waitSyncAttrList
)