GTC Silicon Valley-2019: MVAPICH2-GDR: High-Performance and Scalable CUDA-Aware MPI Library for HPC and AI
GTC Silicon Valley-2019 ID:S9476:MVAPICH2-GDR: High-Performance and Scalable CUDA-Aware MPI Library for HPC and AI
Dhabaleswar K(DK)Panda(The Ohio State University),Hari Subramoni(The Ohio State University)
Learn about advanced features in MVAPICH2 that accelerate HPC and AI on modern dense GPU systems. We'll talk about how MVAPICH2 supports MPI communication from GPU memory and improves it using the CUDA toolkit for optimized performance on different GPU configurations. We'll examine recent advances in MVAPICH2 that support large message collective operations and heterogeneous clusters with GPU and non-GPU nodes. We'll explain how we use the popular OSU micro-benchmark suite, and we'll provide examples from HPC and AI to demonstrate how developers can take advantage of MVAPICH2 in applications using MPI and CUDA/OpenACC. We'll also provide guidance on issues like processor affinity to GPUs and networks that can significantly affect the performance of MPI applications using MVAPICH2.