Tegra 3 Technical Reference Manual
The Tegra 3 Technical Reference Manual ("TRM") is a technical document of over 1,900 pages targeted at those working on open source or other low level software projects that use or target the Tegra 3 processor. The TRM focuses on the logical organization and control of Tegra 3 Series devices. It provides information for those modules that interface to external devices, or those that control fundamental chip operations. The modules detailed in this document provide an overview, any necessary programming guidelines, and a register listing for that module. Internal functional units such as video and graphics hardware acceleration are controlled by NVIDIA provided software and not documented.
NVIDIA provides access to the Tegra 3 Technical Reference Manual to registered developers only. To become a registered developer, please sign up for our Embedded Registered Developer Program.
If you are already a Registered Developer, you can download the TRM from our Download Center.
Table of Contents
- Introduction
- Address and Interrupt Map
- Interrupt Controller
- Arbitration Semaphores
- Atomics
- Clock and Reset Controller
- Timers
- Multi-Purpose I/O Pins and Pin Multiplexing (Pinmuxing)
- Power Management Controller
- Real-Time Clock
- GR2D
- EPP - Encoder Pre-Processor
- Keyboard Controller
- GPIO Controller
- CPU
- Level 2 Cache Controller
- Flow Controller
- Memory Controller
- AHB
- APB
- USB Complex
- Audio Hub
- Display Controller
- MIPI-DSI (Display Serial Interface)
- High-Definition Multimedia Interface
- MIPI-CSI (Camera Serial Interface)
- Video Input (VI)
- SD/MMC Controller
- NAND Flash Controller
- GMI Controller
- SATA Controller
- PCI Express (PCIe) Architecture
- I2C Controller
- UART and VFIR Controller
- SLINK: SPI Peripheral Interface
- One Wire Battery Controller
- PWFM Controller
- Thermal Sensor